1. Field of the Invention
The present invention relates to an output buffer circuit, a memory chip and a semiconductor device having a circuit for controlling a buffer size. More specifically, the present invention relates to an output buffer circuit having an adjusting function for matching a buffer size of a programmable impedance buffer with external impedance.
2. Description of Related Art
In recent years, data transfer rates required for a semiconductor memory device (a memory chip) have increased and the operating frequency thereof has reached a level of several hundred MHz. In data transmission at such high frequencies, there is a risk of data signal reflection, which may interfere with the normal transmission of data signals. Data signal reflection is caused by a certain impedance, which is attributable to resistance and inductance of wiring connected to the memory chip, or attributable to a capacity of a connected device. If the operating conditions are fixed, data signal reflection is avoidable by matching the internal impedance and the external impedance of the memory chip. However, physically, the internal impedance of a memory chip varies easily according to changes in operating voltages or external factors such as temperature.
Accordingly, the external impedance is referenced by use of a programmable impedance circuit technology, so that the internal impedance of the memory chip is automatically matched with the external impedance regardless of changes in operating voltages or temperatures. To be more precise, impedance of a programmable impedance buffer (hereinafter referred to as a “buffer size”) inside the memory chip is matched with the external impedance at high precision by varying the driving force of a transistor which constitutes the programmable impedance buffer. From the point of circuit design, the impedance deviation which is attributable to the changes in the environment is thereby corrected.
Such adjustment of the buffer size is carried out in a writing operation or in a “no operation (NOPE)” state, but not in a reading operation. Therefore, if the internal impedance of the memory chip is changed during continuous reading operations, the buffer size cannot be adjusted and data signal reflection occurs.